The present invention relates to computer networks generally and, more particularly, to a circuit and method for providing configurable packet re-timing in a flexible network repeater hub.
Computer networks allow the connectivity of a number of nodes through a physical network layer. The physical layer is generally connected through a number of repeaters, often configured in a hub or core. A number of different physical layer protocols exist, such as 10baseT Ethernet, 100baseT Ethernet, etc. While certain strict protocols have been defined by the Institute of Electrical and Electronics Engineers, it is often possible to enhance the performance of a device by varying certain parameters of the repeaters. Additionally, variations of physical layer devices (PHYs) may be implemented by various computer venders introducing such protocol variations as TX, FX, etc. T4. Each particular physical layer device variation may have an ideal start of packet (SOP) delay that produces improved system performance in particular applications, such as the operation over twisted pair, fiber optic, etc.
Conventional approaches to solving the problem of providing compatibility between multiple media vender devices typically place the burden on the physical layer of the network by strictly constraining the carrier sense-to-data relationship of each of the physical devices. This type of strict constraint may force the use of devices manufactured by one vender for the entire physical layer to ensure compatibility. Single vender solutions are not desirable in a competitive market, particularly for venders other than the single vendor.
Another solution to provide compatibility between multiple media venders may incorporate extremely deep (and often inefficient) First-In-First-Out(FIFO) buffers to accommodate a mix of physical layer devices. In such a configuration, the overall performance of the repeater hub is fixed, not allowing for aggressive or conservative performance alternatives in the overall design. The conventional method generally restricts the design of the repeater hub to a narrow range of physical layer devices that conform to the strict rules of the particular carrier sensing packet data relationship. While the implementation of inefficient and unnecessarily deep FIFOs may allow some flexibility, the overall performance of the repeater hub is fixed and does not allow the dynamic optimization of the SOP delay.
The present invention concerns a circuit comprising a first circuit and a second circuit. The first circuit may be configured to present information after a delay in response to a plurality of transmit and receive inputs. The second circuit may be configured to adjust the amount of delay prior to presenting information. The second circuit may be implemented as a state machine.
The objects, features and advantages of the present invention include providing a repeater hub accessible through a media independent interface which allows for (i) dynamic control from the system agent, (ii) programmability of a start of packet delay to compensate for variable PHY latency, (iii) programmability of an output enable delay, (iv) a reduction in the overall size of internal FIFOs and (v) the ability to optimize the distance between read and write pointers of the internal FIFO based on particular system characteristics.